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Makefile.objs 938 Bytes
e500-ccsr.h 337 Bytes
e500.c 23.3 kB
e500.h 572 Bytes
e500plat.c 1.9 kB
mpc8544ds.c 1.8 kB

Latest revisions

# Date Author Comment
347dd79d 12/14/2012 02:12 pm Alexander Graf

PPC: E500: Generate dt pci irq map dynamically

Today we're hardcoding the PCI interrupt map in the e500 machine file.
Instead, let's write it dynamically so that different machine types
can have different slot properties.

Signed-off-by: Alexander Graf <>
492ec48d 12/14/2012 02:12 pm Alexander Graf

PPC: E500: Move PCI slot information into params

We have a params struct that allows us to expose differences between
e500 machine models. Include PCI slot information there, so we can have
different machines with different PCI slot topology.

Signed-off-by: Alexander Graf <>
3bb7e02a 12/14/2012 02:12 pm Alexander Graf

PPC: E500plat: Make a lot of PCI slots available

The ppce500 machine doesn't have to stick to hardware limitations,
as it's defined as being fully device tree based.

Thus we can change the initial PCI slot ID to 0x1 which gives us a
whopping 31 PCI devices we can support with this machine now!...
9e2c1298 12/14/2012 02:12 pm Alexander Graf

PPC: e500: pci: Export slot2irq calculation

We need the calculation method to get from a PCI slot ID to its respective
interrupt line twice. Once in the internal map function and once when
assembling the device tree.

So let's extract the calculation to a separate function that can be called...
5bac0701 12/14/2012 02:12 pm Alexander Graf

openpic: remove irq_out

The current openpic emulation contains half-ready code for bypass mode.
Remove it, so that when someone wants to finish it they can start from a
clean state.

Signed-off-by: Alexander Graf <>
d0b72631 12/14/2012 02:12 pm Alexander Graf

openpic: convert to qdev

This patch converts the OpenPIC device to qdev. Along the way it
renames the "openpic" target to "raven" and the "mpic" target to
"fsl_mpic_20", to better reflect the actual models they implement.

This way we have a generic OpenPIC device now that can handle...
a911b7a9 12/14/2012 02:12 pm Alexander Graf

PPC: e500: Add MSI support

Now that our interrupt controller supports MSIs, let's expose that feature
to the guest through the device tree!

Signed-off-by: Alexander Graf <>
cdbb912a 12/14/2012 02:12 pm Alexander Graf

mpic: Unify numbering scheme

MPIC interrupt numbers in Linux (device tree) and in QEMU are different,
because QEMU takes the sparseness of the IRQ number space into account.

Remove that cleverness and instead assume a flat number space. This makes
the code easier to understand, because we are actually aligned with Linux...
dffb1dc2 12/14/2012 02:12 pm Bharat Bhushan

e500: Adding CCSR memory region

All devices are also placed under CCSR memory region.
The CCSR memory region is exported to pci device. The MSI interrupt
generation is the main reason to export the CCSR region to PCI device.
This put the requirement to move mpic under CCSR region, but logically...
3eddc1be 12/14/2012 02:12 pm Bharat Bhushan

Adding BAR0 for e500 PCI controller

PCI Root complex have TYPE-1 configuration header while PCI endpoint
have type-0 configuration header. The type-1 configuration header have
a BAR (BAR0). In Freescale PCI controller BAR0 is used for mapping pci
address space to CCSR address space. This can used for 2 purposes: 1)...

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