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PPC: E500: Generate dt pci irq map dynamically
Today we're hardcoding the PCI interrupt map in the e500 machine file.Instead, let's write it dynamically so that different machine typescan have different slot properties.
Signed-off-by: Alexander Graf <agraf@suse.de>
PPC: E500: Move PCI slot information into params
We have a params struct that allows us to expose differences betweene500 machine models. Include PCI slot information there, so we can havedifferent machines with different PCI slot topology.
PPC: e500: pci: Export slot2irq calculation
We need the calculation method to get from a PCI slot ID to its respectiveinterrupt line twice. Once in the internal map function and once whenassembling the device tree.
So let's extract the calculation to a separate function that can be called...
openpic: remove irq_out
The current openpic emulation contains half-ready code for bypass mode.Remove it, so that when someone wants to finish it they can start from aclean state.
openpic: convert to qdev
This patch converts the OpenPIC device to qdev. Along the way itrenames the "openpic" target to "raven" and the "mpic" target to"fsl_mpic_20", to better reflect the actual models they implement.
This way we have a generic OpenPIC device now that can handle...
PPC: e500: Add MSI support
Now that our interrupt controller supports MSIs, let's expose that featureto the guest through the device tree!
mpic: Unify numbering scheme
MPIC interrupt numbers in Linux (device tree) and in QEMU are different,because QEMU takes the sparseness of the IRQ number space into account.
Remove that cleverness and instead assume a flat number space. This makesthe code easier to understand, because we are actually aligned with Linux...
e500: Adding CCSR memory region
All devices are also placed under CCSR memory region.The CCSR memory region is exported to pci device. The MSI interruptgeneration is the main reason to export the CCSR region to PCI device.This put the requirement to move mpic under CCSR region, but logically...
Adding BAR0 for e500 PCI controller
PCI Root complex have TYPE-1 configuration header while PCI endpointhave type-0 configuration header. The type-1 configuration header havea BAR (BAR0). In Freescale PCI controller BAR0 is used for mapping pciaddress space to CCSR address space. This can used for 2 purposes: 1)...
PPC: e500: Map PIO space into core memory region
On PPC, we don't have PIO. So usually PIO space behind a PCI bridge isaccessible via MMIO. Do this mapping explicitly by mapping the PIO spaceof our PCI bus into a memory region that lives in memory space....
e500: Fix serial initialization
it was wrongly using serial_hds0 instead of serial_hds1
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>Reviewed-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes arereserved) and its purpose doesn't match the name (most target_phys_addr_taddresses are not target specific). Replace it with a finger-friendly,...
serial: split serial.c
Split serial.c into serial.c, serial.h and serial-isa.c. While being atcreating a serial.h header file move the serial prototypes from pc.h tothe new serial.h. The latter leads to s/pc.h/serial.h/ in tons ofboards which just want the serial bits from pc.h...
fdt: move dumpdtb interpretation code to device_tree.c
The dumpdtb code can be useful in more places than just for e500. Move itto a generic place.
PPC: e500: increase DTC_LOAD_PAD
An allowance of 5 MiB for BSS is not enough for Linux kernels with certaindebug options enabled (not sure exactly which one caused it, but I'd guesslockdep). The kernel I ran into this with had a BSS of around 6.4 MB....
PPC: e500: calculate initrd_base like dt_base
While investigating dtb pad issues, I noticed that initrd_base wasn't takingloadaddr into account the way dt_base was. This seems wrong.
Signed-off-by: Scott Wood <scottwood@freescale.com>Signed-off-by: Alexander Graf <agraf@suse.de>
PPC: e500: Only expose even TLB sizes in initial TLB
When booting our e500 machine, we automatically generate a big TLB entryin TLB1 that covers all of the code we need to run in there until the guestcan handle its TLB on its own.
However, e500v2 can only handle MAS1.0 sizes. However, we keep our TLB...
Revert "PPC: e500: Use new MPIC dt format"
This reverts commit 518c7fb44f2182cde943dc64f88cb2fd4e4ff6b5. It breaksnew Linux guests with SMP, because IPIs get mapped to large vectors whichour MPIC emulation does not implement.
Conflicts:
hw/ppc/e500.c
PPC: e500: rename mpc8544ds into generic file
Rename the file (with no changes other than fixing up the header paths)in preparation for refactoring into a generic e500 platform. Also moveit into the newly created ppc/ directory.
Signed-off-by: Scott Wood <scottwood@freescale.com>...
PPC: e500: change internal references away from mpc8544ds
No functional changes -- machine is still outwardly mpc8544ds.
The references that are not changed contain mpc8544 hardware details thatneed to be parameterized if/when a different e500 platform wants to...
PPC: e500: split mpc8544ds machine from generic e500 code
Currently the only mpc8544ds-ism that is factored out istoplevel compatible and model. In the future the generic e500code is expected to become more generic.