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target-xtensa: implement ATOMCTL SR
ATOMCTL SR controls s32c1i opcode behavior depending on targeted memorytype. See ISA, 4.3.12.4 for details.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: rename helper flags
Rename helper flags to the new ones. This is purely a mechanical change,it's possible to use better flags by looking at the helpers.
Cc: Max Filippov <jcmvbkbc@gmail.com>Reviewed-by: Richard Henderson <rth@twiddle.net>...
target-xtensa: implement FP1 group
These are comparison and conditional move opcodes.See ISA, 4.3.10 for more details.
target-xtensa: add FP registers
There are 16 32-bit FP registers (f0 - f15), control and status userregisters (fcr, fsr).
See ISA, 4.3.10 for more details.
target-xtensa: implement FP0 arithmetic
These are FP arithmetic opcodes.See ISA, 4.3.10 for more details.
target-xtensa: implement FP0 conversions
These are FP to integer and integer to FP conversion opcodes.See ISA, 4.3.10 for more details.
Note that ISA description for utrunc.s is currently incorrect and willbe fixed in future revisions.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>...
target-xtensa: switch to AREG0-free mode
Add env parameter to every helper function that needs it, update'configure' script.
target-xtensa: add attributes to helper functions
Mark exception generating functions 'noreturn' and pure constantfunctions as such.
target-xtensa: Move helpers.h to helper.h
Provides a file naming scheme consistent with other targets.
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>