History | View | Annotate | Download (64.4 kB)
target-ppc: move POWER7+ to a separate family
So far POWER7+ was a part of POWER7 family. However it has a differentPVR base value so in order to support PVR masks, it needs a separatefamily class.
This adds a new family class, PVR base and mask values and moves...
powerpc: add PVR mask support
IBM POWERPC processors encode PVR as a CPU family in higher 16 bits anda CPU version in lower 16 bits. Since there is no significant changein behavior between versions, there is no point to add every single CPUversion in QEMU's CPU list. Also, new CPU versions of already supported...
target-ppc: Turn POWER5gr CPU into alias for POWER5
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>Message-id: 1375321323-29954-3-git-send-email-afaerber@suse.deSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
target-ppc: Prepare POWER5P CPU family
It is ISA 2.03. Modelled as 970FX minus AltiVec flag.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>Cc: Alexey Kardashevskiy <aik@ozlabs.ru>Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>...
target-ppc: Add POWER5+ v2.1 CPU model
Let's avoid -cpu host barfing at this PVR.Linux recognizes it as "POWER5+ (gs) v2.1".
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>Message-id: 1375321323-29954-5-git-send-email-afaerber@suse.de...
target-ppc: Turn POWER5gs CPU into alias for POWER5+
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>Message-id: 1375321323-29954-2-git-send-email-afaerber@suse.deSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
target-ppc: Fix POWER7+ model
Commit 03a15a5436ed7723f406f15cc3798aa9991e75b5 claimed to add a POWER7+model but instead added a "POWER7P" model, with an unhelpful "POWER7P" description on top. Fix this to "POWER7+" as we already have "POWER3+","POWER4+" and "POWER5+" and there being no reason to deviate with the...
target-ppc: Add POWER7+ CPU model
This patch adds CPU PVR definition for POWER7+.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>Message-id: 1375412374-24701-1-git-send-email-aik@ozlabs.ruSigned-off-by: Anthony Liguori <aliguori@us.ibm.com>
e600 core for MPC86xx processors
MPC86xx processors are based on the e600 core, which is not the casein qemu where it is based on the 7400 processor.
This patch creates the e600 core and instantiates the MPC86xxprocessors based on it. Therefore, adding the high BATs, the SPRG...
target-ppc: Add POWER8 v1.0 CPU model
This patch adds CPU PVR definition for POWER8,and enables QEMU to launch guests on POWER8 hardware.
Signed-off-by: Prerna Saxena
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Paul Mackerras <paulus@samba.org>...
PPC: Introduce an alias cache for faster lookups
When running QEMU with "-cpu ?" we walk through every alias for everytarget CPU we know about. This takes several seconds on my very fasthost system.
Let's introduce a class object cache in the alias table. Using that we...
target-ppc: Remove vestigial PowerPC 620 support
The PowerPC 620 was the very first 64-bit PowerPC implementation, buthardly anyone ever actually used the chips. qemu notionally supports the620, but since we don't actually have code to implement the segment table,...
target-ppc: Move CPU aliases out of translate_init.c
Move array of CPU aliases to cpu-models.c, alongside model definitions.This requires to zero-terminate the aliases array since ARRAY_SIZE() canno longer be used in translate_init.c then.
Suggested-by: Alexander Graf <agraf@suse.de>...
target-ppc: Split model definitions out of translate_init.c
Now that model definitions only reference their parent type, modeldefinitions are independent of the family definitions and can becompiled independently of TCG translation.
Keep all #if defined(TODO) code local to cpu-models.c....
target-ppc: Fix remaining microcontroller typos among models
controler -> controller
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>