Archipelago » qemu

/*

 *  PowerPC emulation helpers for qemu.

 *

 *  Copyright (c) 2003-2007 Jocelyn Mayer

 *

 * This library is free software; you can redistribute it and/or

 * modify it under the terms of the GNU Lesser General Public

 * License as published by the Free Software Foundation; either

 * version 2 of the License, or (at your option) any later version.

 *

 * This library is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * Lesser General Public License for more details.

 *

 * You should have received a copy of the GNU Lesser General Public

 * License along with this library; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

#include "exec.h"

#include "host-utils.h"

#include "helper_regs.h"

#include "op_helper.h"

#define MEMSUFFIX _raw

#include "op_helper.h"

#include "op_helper_mem.h"

#if !defined(CONFIG_USER_ONLY)

#define MEMSUFFIX _user

#include "op_helper.h"

#include "op_helper_mem.h"

#define MEMSUFFIX _kernel

#include "op_helper.h"

#include "op_helper_mem.h"

#define MEMSUFFIX _hypv

#include "op_helper.h"

#include "op_helper_mem.h"

#endif

//#define DEBUG_OP

//#define DEBUG_EXCEPTIONS

//#define DEBUG_SOFTWARE_TLB

/*****************************************************************************/

/* Exceptions processing helpers */

void do_raise_exception_err (uint32_t exception, int error_code)

{

#if 0

    printf("Raise exception %3x code : %d\n", exception, error_code);

#endif

    env->exception_index = exception;

    env->error_code = error_code;

    cpu_loop_exit();

}

void do_raise_exception (uint32_t exception)

{

    do_raise_exception_err(exception, 0);

}

/*****************************************************************************/

/* Registers load and stores */

uint32_t helper_load_cr (void)

{

    return (env->crf[0] << 28) |

           (env->crf[1] << 24) |

           (env->crf[2] << 20) |

           (env->crf[3] << 16) |

           (env->crf[4] << 12) |

           (env->crf[5] << 8) |

           (env->crf[6] << 4) |

           (env->crf[7] << 0);

}

void helper_store_cr (target_ulong val, uint32_t mask)

{

    int i, sh;

    for (i = 0, sh = 7; i < 8; i++, sh--) {

        if (mask & (1 << sh))

            env->crf[i] = (val >> (sh * 4)) & 0xFUL;

    }

}

#if defined(TARGET_PPC64)

void do_store_pri (int prio)

{

    env->spr[SPR_PPR] &= ~0x001C000000000000ULL;

    env->spr[SPR_PPR] |= ((uint64_t)prio & 0x7) << 50;

}

#endif

target_ulong ppc_load_dump_spr (int sprn)

{

    if (loglevel != 0) {

        fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n",

                sprn, sprn, env->spr[sprn]);

    }

    return env->spr[sprn];

}

void ppc_store_dump_spr (int sprn, target_ulong val)

{

    if (loglevel != 0) {

        fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n",

                sprn, sprn, env->spr[sprn], val);

    }

    env->spr[sprn] = val;

}

/*****************************************************************************/

/* Fixed point operations helpers */

void do_adde (void)

{

    T2 = T0;

    T0 += T1 + xer_ca;

    if (likely(!((uint32_t)T0 < (uint32_t)T2 ||

                 (xer_ca == 1 && (uint32_t)T0 == (uint32_t)T2)))) {

        env->xer &= ~(1 << XER_CA);

    } else {

        env->xer |= (1 << XER_CA);

    }

}

#if defined(TARGET_PPC64)

void do_adde_64 (void)

{

    T2 = T0;

    T0 += T1 + xer_ca;

    if (likely(!((uint64_t)T0 < (uint64_t)T2 ||

                 (xer_ca == 1 && (uint64_t)T0 == (uint64_t)T2)))) {

        env->xer &= ~(1 << XER_CA);

    } else {

        env->xer |= (1 << XER_CA);

    }

}

#endif

void do_addmeo (void)

{

    int ov;

    T1 = T0;

    T0 += xer_ca + (-1);

    ov = ((uint32_t)T1 & ((uint32_t)T1 ^ (uint32_t)T0)) >> 31;

    if (ov) {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    } else {

        env->xer &= ~(1 << XER_OV);

    }

    if (likely((uint32_t)T1 != 0))

        env->xer |= (1 << XER_CA);

}

#if defined(TARGET_PPC64)

void do_addmeo_64 (void)

{

    int ov;

    T1 = T0;

    T0 += xer_ca + (-1);

    ov = ((uint64_t)T1 & ((uint64_t)T1 ^ (uint64_t)T0)) >> 63;

    if (ov) {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    } else {

        env->xer &= ~(1 << XER_OV);

    }

    if (likely((uint64_t)T1 != 0))

        env->xer |= (1 << XER_CA);

}

#endif

void do_divwo (void)

{

    if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) ||

                 (int32_t)T1 == 0))) {

        env->xer &= ~(1 << XER_OV);

        T0 = (int32_t)T0 / (int32_t)T1;

    } else {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

        T0 = UINT32_MAX * ((uint32_t)T0 >> 31);

    }

}

#if defined(TARGET_PPC64)

void do_divdo (void)

{

    if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == (int64_t)-1LL) ||

                 (int64_t)T1 == 0))) {

        env->xer &= ~(1 << XER_OV);

        T0 = (int64_t)T0 / (int64_t)T1;

    } else {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

        T0 = UINT64_MAX * ((uint64_t)T0 >> 63);

    }

}

#endif

void do_divwuo (void)

{

    if (likely((uint32_t)T1 != 0)) {

        env->xer &= ~(1 << XER_OV);

        T0 = (uint32_t)T0 / (uint32_t)T1;

    } else {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

        T0 = 0;

    }

}

#if defined(TARGET_PPC64)

void do_divduo (void)

{

    if (likely((uint64_t)T1 != 0)) {

        env->xer &= ~(1 << XER_OV);

        T0 = (uint64_t)T0 / (uint64_t)T1;

    } else {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

        T0 = 0;

    }

}

#endif

void do_mullwo (void)

{

    int64_t res = (int64_t)(int32_t)T0 * (int64_t)(int32_t)T1;

    if (likely((int32_t)res == res)) {

        env->xer &= ~(1 << XER_OV);

    } else {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    }

    T0 = (int32_t)res;

}

#if defined(TARGET_PPC64)

void do_mulldo (void)

{

    int64_t th;

    uint64_t tl;

    muls64(&tl, (uint64_t *)&th, T0, T1);

    T0 = (int64_t)tl;

    /* If th != 0 && th != -1, then we had an overflow */

    if (likely((uint64_t)(th + 1) <= 1)) {

        env->xer &= ~(1 << XER_OV);

    } else {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    }

}

#endif

void do_nego (void)

{

    if (likely((int32_t)T0 != INT32_MIN)) {

        env->xer &= ~(1 << XER_OV);

        T0 = -(int32_t)T0;

    } else {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    }

}

#if defined(TARGET_PPC64)

void do_nego_64 (void)

{

    if (likely((int64_t)T0 != INT64_MIN)) {

        env->xer &= ~(1 << XER_OV);

        T0 = -(int64_t)T0;

    } else {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    }

}

#endif

void do_subfe (void)

{

    T0 = T1 + ~T0 + xer_ca;

    if (likely((uint32_t)T0 >= (uint32_t)T1 &&

               (xer_ca == 0 || (uint32_t)T0 != (uint32_t)T1))) {

        env->xer &= ~(1 << XER_CA);

    } else {

        env->xer |= (1 << XER_CA);

    }

}

#if defined(TARGET_PPC64)

void do_subfe_64 (void)

{

    T0 = T1 + ~T0 + xer_ca;

    if (likely((uint64_t)T0 >= (uint64_t)T1 &&

               (xer_ca == 0 || (uint64_t)T0 != (uint64_t)T1))) {

        env->xer &= ~(1 << XER_CA);

    } else {

        env->xer |= (1 << XER_CA);

    }

}

#endif

void do_subfmeo (void)

{

    int ov;

    T1 = T0;

    T0 = ~T0 + xer_ca - 1;

    ov = ((uint32_t)~T1 & ((uint32_t)~T1 ^ (uint32_t)T0)) >> 31;

    if (ov) {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    } else {

        env->xer &= ~(1 << XER_OV);

    }

    if (likely((uint32_t)T1 != UINT32_MAX))

        env->xer |= (1 << XER_CA);

}

#if defined(TARGET_PPC64)

void do_subfmeo_64 (void)

{

    int ov;

    T1 = T0;

    T0 = ~T0 + xer_ca - 1;

    ov = ((uint64_t)~T1 & ((uint64_t)~T1 ^ (uint64_t)T0)) >> 63;

    if (ov) {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    } else {

        env->xer &= ~(1 << XER_OV);

    }

    if (likely((uint64_t)T1 != UINT64_MAX))

        env->xer |= (1 << XER_CA);

}

#endif

void do_subfzeo (void)

{

    int ov;

    T1 = T0;

    T0 = ~T0 + xer_ca;

    ov = (((uint32_t)~T1 ^ UINT32_MAX) &

          ((uint32_t)(~T1) ^ (uint32_t)T0)) >> 31;

    if (ov) {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    } else {

        env->xer &= ~(1 << XER_OV);

    }

    if (likely((uint32_t)T0 >= (uint32_t)~T1)) {

        env->xer &= ~(1 << XER_CA);

    } else {

        env->xer |= (1 << XER_CA);

    }

}

#if defined(TARGET_PPC64)

void do_subfzeo_64 (void)

{

    int ov;

    T1 = T0;

    T0 = ~T0 + xer_ca;

    ov = (((uint64_t)~T1 ^  UINT64_MAX) &

          ((uint64_t)(~T1) ^ (uint64_t)T0)) >> 63;

    if (ov) {

        env->xer |= (1 << XER_OV) | (1 << XER_SO);

    } else {

        env->xer &= ~(1 << XER_OV);

    }

    if (likely((uint64_t)T0 >= (uint64_t)~T1)) {

        env->xer &= ~(1 << XER_CA);

    } else {

        env->xer |= (1 << XER_CA);

    }

}

#endif

void do_cntlzw (void)

{

    T0 = clz32(T0);

}

#if defined(TARGET_PPC64)

void do_cntlzd (void)

{

    T0 = clz64(T0);

}

#endif

/* shift right arithmetic helper */

void do_sraw (void)

{

    int32_t ret;

    if (likely(!(T1 & 0x20UL))) {

        if (likely((uint32_t)T1 != 0)) {

            ret = (int32_t)T0 >> (T1 & 0x1fUL);

            if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) {

                env->xer &= ~(1 << XER_CA);

            } else {

                env->xer |= (1 << XER_CA);

            }

        } else {

            ret = T0;

            env->xer &= ~(1 << XER_CA);

        }

    } else {

        ret = UINT32_MAX * ((uint32_t)T0 >> 31);

        if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) {

            env->xer &= ~(1 << XER_CA);

        } else {

            env->xer |= (1 << XER_CA);

        }

    }

    T0 = ret;

}

#if defined(TARGET_PPC64)

void do_srad (void)

{

    int64_t ret;

    if (likely(!(T1 & 0x40UL))) {

        if (likely((uint64_t)T1 != 0)) {

            ret = (int64_t)T0 >> (T1 & 0x3FUL);

            if (likely(ret >= 0 || ((int64_t)T0 & ((1 << T1) - 1)) == 0)) {

                env->xer &= ~(1 << XER_CA);

            } else {

                env->xer |= (1 << XER_CA);

            }

        } else {

            ret = T0;

            env->xer &= ~(1 << XER_CA);

        }

    } else {

        ret = UINT64_MAX * ((uint64_t)T0 >> 63);

        if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) {

            env->xer &= ~(1 << XER_CA);

        } else {

            env->xer |= (1 << XER_CA);

        }

    }

    T0 = ret;

}

#endif

void do_popcntb (void)

{

    uint32_t ret;

    int i;

    ret = 0;

    for (i = 0; i < 32; i += 8)

        ret |= ctpop8((T0 >> i) & 0xFF) << i;

    T0 = ret;

}

#if defined(TARGET_PPC64)

void do_popcntb_64 (void)

{

    uint64_t ret;

    int i;

    ret = 0;

    for (i = 0; i < 64; i += 8)

        ret |= ctpop8((T0 >> i) & 0xFF) << i;

    T0 = ret;

}

#endif

/*****************************************************************************/

/* Floating point operations helpers */

static always_inline int fpisneg (float64 d)

{

    CPU_DoubleU u;

    u.d = d;

    return u.ll >> 63 != 0;

}

static always_inline int isden (float64 d)

{

    CPU_DoubleU u;

    u.d = d;

    return ((u.ll >> 52) & 0x7FF) == 0;

}

static always_inline int iszero (float64 d)

{

    CPU_DoubleU u;

    u.d = d;

    return (u.ll & ~0x8000000000000000ULL) == 0;

}

static always_inline int isinfinity (float64 d)

{

    CPU_DoubleU u;

    u.d = d;

    return ((u.ll >> 52) & 0x7FF) == 0x7FF &&

        (u.ll & 0x000FFFFFFFFFFFFFULL) == 0;

}

#ifdef CONFIG_SOFTFLOAT

static always_inline int isfinite (float64 d)

{

    CPU_DoubleU u;

    u.d = d;

    return (((u.ll >> 52) & 0x7FF) != 0x7FF);

}

static always_inline int isnormal (float64 d)

{

    CPU_DoubleU u;

    u.d = d;

    uint32_t exp = (u.ll >> 52) & 0x7FF;

    return ((0 < exp) && (exp < 0x7FF));

}

#endif

void do_compute_fprf (int set_fprf)

{

    int isneg;

    isneg = fpisneg(FT0);

    if (unlikely(float64_is_nan(FT0))) {

        if (float64_is_signaling_nan(FT0)) {

            /* Signaling NaN: flags are undefined */

            T0 = 0x00;

        } else {

            /* Quiet NaN */

            T0 = 0x11;

        }

    } else if (unlikely(isinfinity(FT0))) {

        /* +/- infinity */

        if (isneg)

            T0 = 0x09;

        else

            T0 = 0x05;

    } else {

        if (iszero(FT0)) {

            /* +/- zero */

            if (isneg)

                T0 = 0x12;

            else

                T0 = 0x02;

        } else {

            if (isden(FT0)) {

                /* Denormalized numbers */

                T0 = 0x10;

            } else {

                /* Normalized numbers */

                T0 = 0x00;

            }

            if (isneg) {

                T0 |= 0x08;

            } else {

                T0 |= 0x04;

            }

        }

    }

    if (set_fprf) {

        /* We update FPSCR_FPRF */

        env->fpscr &= ~(0x1F << FPSCR_FPRF);

        env->fpscr |= T0 << FPSCR_FPRF;

    }

    /* We just need fpcc to update Rc1 */

    T0 &= 0xF;

}

/* Floating-point invalid operations exception */

static always_inline void fload_invalid_op_excp (int op)

{

    int ve;

    ve = fpscr_ve;

    if (op & POWERPC_EXCP_FP_VXSNAN) {

        /* Operation on signaling NaN */

        env->fpscr |= 1 << FPSCR_VXSNAN;

    }

    if (op & POWERPC_EXCP_FP_VXSOFT) {

        /* Software-defined condition */

        env->fpscr |= 1 << FPSCR_VXSOFT;

    }

    switch (op & ~(POWERPC_EXCP_FP_VXSOFT | POWERPC_EXCP_FP_VXSNAN)) {

    case POWERPC_EXCP_FP_VXISI:

        /* Magnitude subtraction of infinities */

        env->fpscr |= 1 << FPSCR_VXISI;

        goto update_arith;

    case POWERPC_EXCP_FP_VXIDI:

        /* Division of infinity by infinity */

        env->fpscr |= 1 << FPSCR_VXIDI;

        goto update_arith;

    case POWERPC_EXCP_FP_VXZDZ:

        /* Division of zero by zero */

        env->fpscr |= 1 << FPSCR_VXZDZ;

        goto update_arith;

    case POWERPC_EXCP_FP_VXIMZ:

        /* Multiplication of zero by infinity */

        env->fpscr |= 1 << FPSCR_VXIMZ;

        goto update_arith;

    case POWERPC_EXCP_FP_VXVC:

        /* Ordered comparison of NaN */

        env->fpscr |= 1 << FPSCR_VXVC;

        env->fpscr &= ~(0xF << FPSCR_FPCC);

        env->fpscr |= 0x11 << FPSCR_FPCC;

        /* We must update the target FPR before raising the exception */

        if (ve != 0) {

            env->exception_index = POWERPC_EXCP_PROGRAM;

            env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_VXVC;

            /* Update the floating-point enabled exception summary */

            env->fpscr |= 1 << FPSCR_FEX;

            /* Exception is differed */

            ve = 0;

        }

        break;

    case POWERPC_EXCP_FP_VXSQRT:

        /* Square root of a negative number */

        env->fpscr |= 1 << FPSCR_VXSQRT;

    update_arith:

        env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));

        if (ve == 0) {

            /* Set the result to quiet NaN */

            FT0 = UINT64_MAX;

            env->fpscr &= ~(0xF << FPSCR_FPCC);

            env->fpscr |= 0x11 << FPSCR_FPCC;

        }

        break;

    case POWERPC_EXCP_FP_VXCVI:

        /* Invalid conversion */

        env->fpscr |= 1 << FPSCR_VXCVI;

        env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));

        if (ve == 0) {

            /* Set the result to quiet NaN */

            FT0 = UINT64_MAX;

            env->fpscr &= ~(0xF << FPSCR_FPCC);

            env->fpscr |= 0x11 << FPSCR_FPCC;

        }

        break;

    }

    /* Update the floating-point invalid operation summary */

    env->fpscr |= 1 << FPSCR_VX;

    /* Update the floating-point exception summary */

    env->fpscr |= 1 << FPSCR_FX;

    if (ve != 0) {

        /* Update the floating-point enabled exception summary */

        env->fpscr |= 1 << FPSCR_FEX;

        if (msr_fe0 != 0 || msr_fe1 != 0)

            do_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | op);

    }

}

static always_inline void float_zero_divide_excp (void)

{

    CPU_DoubleU u0, u1;

    env->fpscr |= 1 << FPSCR_ZX;

    env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));

    /* Update the floating-point exception summary */

    env->fpscr |= 1 << FPSCR_FX;

    if (fpscr_ze != 0) {

        /* Update the floating-point enabled exception summary */

        env->fpscr |= 1 << FPSCR_FEX;

        if (msr_fe0 != 0 || msr_fe1 != 0) {

            do_raise_exception_err(POWERPC_EXCP_PROGRAM,

                                   POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX);

        }

    } else {

        /* Set the result to infinity */

        u0.d = FT0;

        u1.d = FT1;

        u0.ll = ((u0.ll ^ u1.ll) & 0x8000000000000000ULL);

        u0.ll |= 0x7FFULL << 52;

        FT0 = u0.d;

    }

}

static always_inline void float_overflow_excp (void)

{

    env->fpscr |= 1 << FPSCR_OX;

    /* Update the floating-point exception summary */

    env->fpscr |= 1 << FPSCR_FX;

    if (fpscr_oe != 0) {

        /* XXX: should adjust the result */

        /* Update the floating-point enabled exception summary */

        env->fpscr |= 1 << FPSCR_FEX;

        /* We must update the target FPR before raising the exception */

        env->exception_index = POWERPC_EXCP_PROGRAM;

        env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_OX;

    } else {

        env->fpscr |= 1 << FPSCR_XX;

        env->fpscr |= 1 << FPSCR_FI;

    }

}

static always_inline void float_underflow_excp (void)

{

    env->fpscr |= 1 << FPSCR_UX;

    /* Update the floating-point exception summary */

    env->fpscr |= 1 << FPSCR_FX;

    if (fpscr_ue != 0) {

        /* XXX: should adjust the result */

        /* Update the floating-point enabled exception summary */

        env->fpscr |= 1 << FPSCR_FEX;

        /* We must update the target FPR before raising the exception */

        env->exception_index = POWERPC_EXCP_PROGRAM;

        env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_UX;

    }

}

static always_inline void float_inexact_excp (void)

{

    env->fpscr |= 1 << FPSCR_XX;

    /* Update the floating-point exception summary */

    env->fpscr |= 1 << FPSCR_FX;

    if (fpscr_xe != 0) {

        /* Update the floating-point enabled exception summary */

        env->fpscr |= 1 << FPSCR_FEX;

        /* We must update the target FPR before raising the exception */

        env->exception_index = POWERPC_EXCP_PROGRAM;

        env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_XX;

    }

}

static always_inline void fpscr_set_rounding_mode (void)

{

    int rnd_type;

    /* Set rounding mode */

    switch (fpscr_rn) {

    case 0:

        /* Best approximation (round to nearest) */

        rnd_type = float_round_nearest_even;

        break;

    case 1:

        /* Smaller magnitude (round toward zero) */

        rnd_type = float_round_to_zero;

        break;

    case 2:

        /* Round toward +infinite */

        rnd_type = float_round_up;

        break;

    default:

    case 3:

        /* Round toward -infinite */

        rnd_type = float_round_down;

        break;

    }

    set_float_rounding_mode(rnd_type, &env->fp_status);

}

void do_fpscr_setbit (int bit)

{

    int prev;

    prev = (env->fpscr >> bit) & 1;

    env->fpscr |= 1 << bit;

    if (prev == 0) {

        switch (bit) {

        case FPSCR_VX:

            env->fpscr |= 1 << FPSCR_FX;

            if (fpscr_ve)

                goto raise_ve;

        case FPSCR_OX:

            env->fpscr |= 1 << FPSCR_FX;

            if (fpscr_oe)

                goto raise_oe;

            break;

        case FPSCR_UX:

            env->fpscr |= 1 << FPSCR_FX;

            if (fpscr_ue)

                goto raise_ue;

            break;

        case FPSCR_ZX:

            env->fpscr |= 1 << FPSCR_FX;

            if (fpscr_ze)

                goto raise_ze;

            break;

        case FPSCR_XX:

            env->fpscr |= 1 << FPSCR_FX;

            if (fpscr_xe)

                goto raise_xe;

            break;

        case FPSCR_VXSNAN:

        case FPSCR_VXISI:

        case FPSCR_VXIDI:

        case FPSCR_VXZDZ:

        case FPSCR_VXIMZ:

        case FPSCR_VXVC:

        case FPSCR_VXSOFT:

        case FPSCR_VXSQRT:

        case FPSCR_VXCVI:

            env->fpscr |= 1 << FPSCR_VX;

            env->fpscr |= 1 << FPSCR_FX;

            if (fpscr_ve != 0)

                goto raise_ve;

            break;

        case FPSCR_VE:

            if (fpscr_vx != 0) {

            raise_ve:

                env->error_code = POWERPC_EXCP_FP;

                if (fpscr_vxsnan)

                    env->error_code |= POWERPC_EXCP_FP_VXSNAN;

                if (fpscr_vxisi)

                    env->error_code |= POWERPC_EXCP_FP_VXISI;

                if (fpscr_vxidi)

                    env->error_code |= POWERPC_EXCP_FP_VXIDI;

                if (fpscr_vxzdz)

                    env->error_code |= POWERPC_EXCP_FP_VXZDZ;

                if (fpscr_vximz)

                    env->error_code |= POWERPC_EXCP_FP_VXIMZ;

                if (fpscr_vxvc)

                    env->error_code |= POWERPC_EXCP_FP_VXVC;

                if (fpscr_vxsoft)

                    env->error_code |= POWERPC_EXCP_FP_VXSOFT;

                if (fpscr_vxsqrt)

                    env->error_code |= POWERPC_EXCP_FP_VXSQRT;

                if (fpscr_vxcvi)

                    env->error_code |= POWERPC_EXCP_FP_VXCVI;

                goto raise_excp;

            }

            break;

        case FPSCR_OE:

            if (fpscr_ox != 0) {

            raise_oe:

                env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_OX;

                goto raise_excp;

            }

            break;

        case FPSCR_UE:

            if (fpscr_ux != 0) {

            raise_ue:

                env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_UX;

                goto raise_excp;

            }

            break;

        case FPSCR_ZE:

            if (fpscr_zx != 0) {

            raise_ze:

                env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_ZX;

                goto raise_excp;

            }

            break;

        case FPSCR_XE:

            if (fpscr_xx != 0) {

            raise_xe:

                env->error_code = POWERPC_EXCP_FP | POWERPC_EXCP_FP_XX;

                goto raise_excp;

            }

            break;

        case FPSCR_RN1:

        case FPSCR_RN:

            fpscr_set_rounding_mode();

            break;

        default:

            break;

        raise_excp:

            /* Update the floating-point enabled exception summary */

            env->fpscr |= 1 << FPSCR_FEX;

                /* We have to update Rc1 before raising the exception */

            env->exception_index = POWERPC_EXCP_PROGRAM;

            break;

        }

    }

}

#if defined(WORDS_BIGENDIAN)

#define WORD0 0

#define WORD1 1

#else

#define WORD0 1

#define WORD1 0

#endif

void do_store_fpscr (uint32_t mask)

{

    /*

     * We use only the 32 LSB of the incoming fpr

     */

    CPU_DoubleU u;

    uint32_t prev, new;

    int i;

    u.d = FT0;

    prev = env->fpscr;

    new = u.l.lower;

    new &= ~0x90000000;

    new |= prev & 0x90000000;

    for (i = 0; i < 7; i++) {

        if (mask & (1 << i)) {

            env->fpscr &= ~(0xF << (4 * i));

            env->fpscr |= new & (0xF << (4 * i));

        }

    }