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target-arm: A64: Implement remaining 3-same instructions
Implement the remaining instructions in the SIMD 3-reg-sameand scalar-3-reg-same groups: FMULX, FRECPS, FRSQRTS, FACGE,FACGT, FMLA and FMLS.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT
Implement the 2-reg-misc CNT, NOT and RBIT instructions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Richard Henderson <rth@twiddle.net>
target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum
Use the VFP_BINOP macro to provide helpers for min, max, minnumand maxnum, rather than hand-rolling them. (The float64 maxversion is not used by A32 but will be needed for A64.)
exec: move include files to include/exec/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target-arm: Use TCG operation for Neon 64 bit negation
Use the TCG operation to do Neon 64 bit negations rather than callinga helper routine for it.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm/neon_helper: Remove obsolete FIXME comment
Commit 33ebc29 fixed the bugs in the implementation of VQRSHL,but forgot to remove the FIXME comment...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
target-arm: Fix typos in comments
Fix a variety of typos in comments in target-arm files.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
target-arm: When setting FPSCR.QC, don't clear other FPSCR bits
This patch fixes a bug affecting a variety of Neon instructions, such asVQADD.
Signed-off-by: Matt Craighead <mjcraighead@gmail.com>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUARMState/g" target-arm/*.[hc] sed -i "s/#define CPUARMState/#define CPUState/" target-arm/cpu.h
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>...
Correct spelling of licensed
Correct typos of "licenced" to "licensed".
Reviewed-by: Stefan Weil <weil@mail.berlios.de>Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de>Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Revert "target-arm: Use global env in neon_helper.c helpers"
This effectively reverts commit 2a3f75b42ac255be09ec2939b96c549ec830efd3so that we return to passing CPUState to helpers as an explicit parameter.(There were a number of conflicts in target-arm/translate.c which had...
target-arm: Pass fp status pointer explicitly to neon fp helpers
Make the Neon helpers for various floating point operations take anexplicit pointer to the float_status they use, so they don't rely onthe global environment pointer any more. This also allows us to drop...
target-arm: Signal InvalidOp for Neon GE and GT compares of QNaN
If the input to a Neon float comparison is a quiet NaN, the ARM ARMspecifies that we should raise InvalidOp if the comparison is GE or GTbut not for EQ. (Signaling NaNs raise InvalidOp regardless). This means...
move helpers.h to helper.h
This provides a consistent naming scheme across all targets.
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm: Don't overflow when calculating value for signed VABAL
In the VABAL instruction we take the absolute difference of twovalues of size x and store it in a result of size 2x. This meanswe have to be careful to calculate the absolute difference using...
target-arm: Make Neon helper routines use correct FP status
Make the Neon helper routines use the correct FP status fromthe CPUEnv rather than using a dummy static one. This meansthey will correctly handle denormals and NaNs and will setFPSCR exception bits properly....
target-arm: Use global env in neon_helper.c helpers
Use the global 'env' variable in the helper functions in neon_helper.c.This means we don't need to pass env as an argument to them any more.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm: Correct ABD's handling of negative zeroes
Implement ABD by taking the absolute value of the differenceof the operands (as the ARM ARM specifies) rather than byflipping the order of the operands to the subtract basedon the results of a comparison. The latter approch gives...
target-arm: Use new softfloat min/max functions for VMAX, VMIN
Use the new softfloat min/max functions to implement the Neon VMAXand VMIN instructions. This allows us to get the right behaviourfor NaN and negative zero.
target-arm: Return right result for Neon comparison with NaNs
Fix the helper functions implementing the Neon floating point comparisonops (VCGE, VCGT, VCEQ, VACGT, VACGE) to return the right answer whenone of the values being compared is a NaN.
target-arm/neon_helper.c: Use make_float32/float32_val macros
Use the softfloat make_float32 and float32_val macros to convert betweensoftfloat's float32 type and raw uint32_t types, rather than privateconversion functions.
target-arm: Fix rounding constant addition for Neon shifts
Handle cases where adding the rounding constant could overflow in Neonshift instructions: VRSHR, VRSRA, VQRSHRN, VQRSHRUN, VRSHRN.
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>[peter.maydell@linaro.org: fix handling of large shifts in rshl_s32,...
target-arm: Fix signed VRSHL by large shift counts
Correctly handle VRSHL of signed values by a shift count of thewidth of the data type or larger, which must be special-cased in thershl_s* helper functions.
target-arm: Fix unsigned VRSHL.s8 and .s16 right shifts by type width
Fix handling of unsigned VRSHL.s8 and .s16 right shifts by the typewidth.
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target-arm: fix unsigned 64 bit right shifts.
Fix range of shift amounts which always give 0 as result.
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm: Fix saturated values for Neon right shifts
Fix value returned by signed 8 and 16 bit qrshl helperswhen the result has saturated.
target-arm: Fix signed VQRSHL by large shift counts
Handle the case of signed VQRSHL by a shift count of the width of thedata type or larger, which must be special cased in the qrshl_s*helper functions.
target-arm: Fix unsigned VQRSHL by large shift counts
Correctly handle VQRSHL of unsigned values by a shift count of thewidth of the data type or larger, which must be special-cased in theqrshl_u* helper functions.
target-arm: Move Neon VZIP to helper functions
Move the implementation of the Neon VUZP unzip instruction from inlinecode to helper functions. (At 50+ TCG ops it was well over therecommended limit for coding inline.) The helper implementations alsogive the correct answers where the inline implementation did not....
target-arm: Move Neon VUZP to helper functions
Move the implementation of the Neon VUZP unzip instruction from inlinecode to helper functions. (At 50+ TCG ops it was well over therecommended limit for coding inline.) The helper implementations alsofix the handling of the quadword version of the instruction....
target-arm: Implement VMULL.P8
Implement VMULL.P8 (the 32x32->64 version of the polynomial multiplyinstruction).
target-arm: Remove stray #include from middle of neon_helper.c
Remove a stray #include <stdio.h> from the middle of neon_helper.c:it was harmless but pointless since we include stdio.h at the topof the file anyway.
target-arm: Fix 32 bit signed saturating narrow
The returned value when doing saturating signed 64->32 bitconversion of a negative number was incorrect due to a missing cast.
target-arm: Fix VQMOVUN Neon instruction.
VQMOVUN does a signed-to-unsigned saturating conversion. This isdifferent from both the signed-to-signed and unsigned-to-unsignedconversions already implemented, so we need a new set of helperfunctions (neon_unarrow_sat*)....
Set the right overflow bit for neon 32 and 64 bit saturating add/sub.
target-arm: Fix Neon VQDMULH.S16 instructions
Correct an error in the implementation of the 16 bitforms of VQDMULH, bringing them into line with the32 bit implementation.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
ARM: add neon helpers for VQSHLU
Add neon helper functions to implement VQSHLU, which is asigned-to-unsigned version of VQSHL available only as animmediate form.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>...
target-arm: Correct result in saturating cases for VQSHL of s8/16/32
Where VQSHL of a signed 8/16/32 bit value saturated, the resultvalue was not being calculated correctly (it should be eitherthe minimum or maximum value for the size of the signed type)....
target-arm: remove pointless else clause in VQSHL of u64
Remove a pointless else clause in the neon_qshl_u64 helper.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm: Fix VQSHL of signed 64 bit values by shift counts >= 64
VQSHL of a signed 64 bit non-zero value by a shift count >= 64 shouldsaturate; return the correct value in this case.
target-arm: Fix VQSHL of signed 64 bit values
Add a missing '-' which meant that we were misinterpreting the shiftargument for VQSHL of 64 bit signed values and treating almost everyshift value as if it were an extremely large right shift.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>...
target-arm: fix neon shift helper functions
Current code is broken at least on recent compilers, comparisonbetween signed and unsigned types yield incorrect code and renderthe neon shift helper functions defunct. This is the third revisionof this patch, casting all comparisons with the sizeof operator to...
rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Fixe ARM NEON vrshl.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Fix few spelling issues in comments
(Stefan Weil)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4187 c046a42c-6fe2-441c-8c8c-71466251a162
ARM TCG conversion 15/16.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4152 c046a42c-6fe2-441c-8c8c-71466251a162
ARM TCG conversion 14/16.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4151 c046a42c-6fe2-441c-8c8c-71466251a162