History | View | Annotate | Download (244.3 kB)
Reorganize PowerPC instructions categories, add icbi separate case.Fix frsqrtes instruction opcode.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3636 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC SPE extension fix: must always preserve GPR high bits when running in 32 bits mode.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3631 c046a42c-6fe2-441c-8c8c-71466251a162
Allow use of SPE extension by all PowerPC targets, adding gprh registers to store GPR MSBs when GPRs are 32 bits.Remove not-needed-anymore ppcemb-linux-user target.Keep ppcemb-softmmu target, which provides 1kB pages support and 36 bits physical address space....
Fix usage of the -1 constant in the PowerPC target code:fix invalid size casts and/or sign-extensions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3626 c046a42c-6fe2-441c-8c8c-71466251a162
Optimize PowerPC overflow flag computation in most useful cases.Use the same routines to check overflow for addo, subfo and PowerPC 405 multiply and add cases.Fix carry reset in addme(o) and subfme(o) cases.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3574 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC 601 need specific callbacks for its BATs setup.Implement PowerPC 601 HID0 register, needed for little-endian mode support.As a consequence, we need to merge hflags coming from MSR with other ones.Use little-endian mode from hflags instead of MSR during code translation....
Improve PowerPC CPU state dump.Dump NIP on SPR access faults.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3522 c046a42c-6fe2-441c-8c8c-71466251a162
Don't print any message when a priviledge exception occurs on mfpvras the Linux allows applications to read this register.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3510 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC coding style and inlining fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3461 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC FPSCR update and floating-point exception generation in most useful cases.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3458 c046a42c-6fe2-441c-8c8c-71466251a162
Bugfix in PowerPC dcbi instruction: we must do a load before the store, or we'll store random data.Update cache instructions comments.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3448 c046a42c-6fe2-441c-8c8c-71466251a162
Pretty dump for specific PowerPC instructions names.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3447 c046a42c-6fe2-441c-8c8c-71466251a162
Gprof prooved the PowerPC emulation spent too much time in MSR load and storeroutines. Coming back to a raw MSR storage model then speed-up the emulation.Improve fast MSR updates (wrtee wrteei and mtriee cases).Share rfi family instructions helpers code to avoid bug in duplicated code....
Replace is_user variable with mmu_idx in softmmu core, allowing support of more than 2 mmu access modes.Add backward compatibility is_user variable in targets code when needed.Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions....
Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3350 c046a42c-6fe2-441c-8c8c-71466251a162
Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3349 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC target coding style fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC target optimisations: make intensive use of always_inline.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
Reorganize the CPUPPCState structure to group features.Add #ifdef to avoid compiling not relevant resources:- MMU related stuff for user-mode only targets- PowerPC 64 only resources for PowerPC 32 targets- embedded PowerPC extensions for non-ppcemb targets....
Add MSR bits signification per PowerPC implementation flags (to be continued).As a side effect, single step and branch step are available again.Remove irrelevant MSR bits definitions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
Full implementation of PowerPC 64 MMU, just missing support for 1 TB memory segments.Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead.Make SLB area size implementation dependant.Improve TLB & SLB search debug traces....
Make PowerPC cache line size implementation dependant.Implement dcbz tunable cache line size for PowerPC 970.Make hardware reset vector implementation dependant.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for hypervisor mode memory accesses.Add comments in load & store tables to ease code reading.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3313 c046a42c-6fe2-441c-8c8c-71466251a162
Fix missing nip updates for instructions that potentially generate exceptions from op helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3308 c046a42c-6fe2-441c-8c8c-71466251a162
Handle all MMU models in switches, even if it's just to abort because of lack of supporting code.Implement 74xx software TLB model.Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss on those processors.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3307 c046a42c-6fe2-441c-8c8c-71466251a162
Optimisations: avoid generation of duplicated micro-ops.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3305 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid op helpers that would just call helpers for TLB & SLB management: call the helpers directly from the micro-ops.Avoid duplicated code for tlbsx. implementation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3302 c046a42c-6fe2-441c-8c8c-71466251a162
Fix (once again) PowerPC sync weight field.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3296 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3287 c046a42c-6fe2-441c-8c8c-71466251a162
Implement Process Priority Register as defined in the PowerPC 2.04 spec.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3282 c046a42c-6fe2-441c-8c8c-71466251a162
Implement new floating-point instructions (fre, frin, friz, frip, frim) as defined in the PowerPC 2.04 specification.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3281 c046a42c-6fe2-441c-8c8c-71466251a162
Improve single-precision floats load & stores: as the PowerPC registers only store double-precision floats, use float64_to_float32 & float32_to_float64 to do the appropriate conversion.Implement stfiwx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3280 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC emulation optimization:avoid stopping translation after most SPR updateswhen a context-synchronization instruction is also needed.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3265 c046a42c-6fe2-441c-8c8c-71466251a162
Define the proper bfd_mach to be used by the disassembler for eachPowerPC emulated CPU.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3257 c046a42c-6fe2-441c-8c8c-71466251a162
Implement size bit in PowerPC 64 comparisons.Allow 'weight' field in sync instruction.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3250 c046a42c-6fe2-441c-8c8c-71466251a162
Fixes for PowerPC 64 rotate and mask instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3247 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC definitions, from POWER 2.04 specifications and misc sources.Check that at least instructions set and SPRs are correct for PowerPC 401, 403, 405 and 440 cores.Implement PowerPC 401 MMU model (real-mode only).Improve INSNs and SPRs dump to ease parse with standard shell tools....
Rework PowerPC 440 TLB management (thanks to Hollis Blanchard)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3200 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for PowerPC BookE MMU model support.Better MSR flags initialisation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3189 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC flags update/use fixes:- fix confusion between overflow/summary overflow, as reported by S Bansal.- reset carry in addic. optimized case (as it was already done in addic).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3179 c046a42c-6fe2-441c-8c8c-71466251a162
Coding style fixes in PowerPC related code (no functional change):- avoid useless blanks at EOL.- avoid tabs.- fix wrapping lines on 80 chars terminals.- add missing ';' at macros EOL to avoid confusing auto-identers.- fix identation.- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)...
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Fix tb->size mishandling, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
Spelling fix (Mark Glines)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2879 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for new PowerPC embedded target support with:- 1 kB page size- 64 bits GPR- 64 bits physical address space- SPE extension support.Change TARGET_PPCSPE into TARGET_PPCEMB
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2718 c046a42c-6fe2-441c-8c8c-71466251a162
No functional changes:- compilation warning fixes- make loglevel tests consistent- use cpu_abort instead of printf(...); exit
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2706 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC emulation bugfixes:- don't generate multiple exit_tb at the end of conditional branches- disable TRACE exception as it is not correct for embedded PowerPC.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2679 c046a42c-6fe2-441c-8c8c-71466251a162
Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdout
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2677 c046a42c-6fe2-441c-8c8c-71466251a162
Fix for PowerPC 64 rotates.Fix for PowerPC 64 load & store with immediate index.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2617 c046a42c-6fe2-441c-8c8c-71466251a162
Fix rfi instruction: do not depend on current execution mode but on the execution mode that will be effective after the return.Add rfci, rfdi and rfmci for BookE PowerPC.Extend mfdcr / mtdcr and implement mfdrcx / mtdcrx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2544 c046a42c-6fe2-441c-8c8c-71466251a162
Add missing PowerPC 64 instructionsPowerPC 64 fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2530 c046a42c-6fe2-441c-8c8c-71466251a162
Fix debug printf: we need different macros for target_ulong prints and GPR ones, as the lengths can be different.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2529 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC improvments:- add missing 64 bits rotate instructions- safely define TARGET_PPCSPE when 64 bits registers are used a separate target will be needed to use it in 32 bits mode on 32 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2527 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC bugfixes:- must clear carry bit when doing addic with a zero immediate value- fix missing RETURN in micro-operation that would lead to random failures and crashes- add USE_PRECISE_EMULATION compilation-time option to choose between getting exact floating point results and fast but less accurate computation....
PowerPC 2.03 SPE extension - first pass.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2519 c046a42c-6fe2-441c-8c8c-71466251a162
Define gen_intermediate_code_internal as "static inline".
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2512 c046a42c-6fe2-441c-8c8c-71466251a162
As icbi is not a priviledge instruction and is treated as a load by the MMUit needs to be implemented for every MMU translation mode.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2492 c046a42c-6fe2-441c-8c8c-71466251a162
Make it safe to use 64 bits GPR and/or 64 bits host registers.For "symetry", add 64 bits versions of all modified functions.As a side effect, add a lot of code provision for PowerPC 64 support.Move overflow and carry checks in common routines for simple cases....
Great PowerPC emulation code resynchronisation and improvments:- Add status file to make regression tracking easier- Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c- Update copyrights- Add new / missing PowerPC CPU definitions...
PPC32 Trace Exception and Trap instruction, by Jason Wessel.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2291 c046a42c-6fe2-441c-8c8c-71466251a162
C99 64 bit printf
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
PPC Breakpoints for gdb-stub (Jason Wessel)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1933 c046a42c-6fe2-441c-8c8c-71466251a162
halt state support for ppc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1657 c046a42c-6fe2-441c-8c8c-71466251a162
avoid generating useless exceptions (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1656 c046a42c-6fe2-441c-8c8c-71466251a162
target_disas() little endian change
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1642 c046a42c-6fe2-441c-8c8c-71466251a162
use direct jump only for jumps in the same page - stop translation after mtsr[in]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1628 c046a42c-6fe2-441c-8c8c-71466251a162
suppressed JUMP_TB (Paul Brook)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1594 c046a42c-6fe2-441c-8c8c-71466251a162
simplified PowerPC exception handling (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1492 c046a42c-6fe2-441c-8c8c-71466251a162
preliminary patch to support more PowerPC CPUs (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1489 c046a42c-6fe2-441c-8c8c-71466251a162
simplified end of page handling
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1443 c046a42c-6fe2-441c-8c8c-71466251a162
fixed lsw[ix] / stsw[ix] potential exception bug - mtcrf workaround for Mac OS X 10.4 - use direct jump at page boundary
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1441 c046a42c-6fe2-441c-8c8c-71466251a162
dcbz fix (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1429 c046a42c-6fe2-441c-8c8c-71466251a162
This patch adds little-endian mode support to PPC emulation.This is needed by OS/2 and Windows NT and some programs like VirtualPC.This patch has been tested using OS/2 bootloader (thanks to TeroKaarlela).(Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1379 c046a42c-6fe2-441c-8c8c-71466251a162
- remove the ugly "stop" pseudo-opcode.- fix fsqrt instruction (there's no fsqrt.).- floating point load and store are not integer instructions.- wrong opcode for dcba instructions.(Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1378 c046a42c-6fe2-441c-8c8c-71466251a162
fpu fixes (Jocelyn Mayer) - soft float support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1335 c046a42c-6fe2-441c-8c8c-71466251a162
ppc fixes (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1297 c046a42c-6fe2-441c-8c8c-71466251a162
ppc fixes - gcc 3.4 compile fix (initial patch by Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1273 c046a42c-6fe2-441c-8c8c-71466251a162
64 bit target support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162
monitor fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1110 c046a42c-6fe2-441c-8c8c-71466251a162
removed access_type hack
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1095 c046a42c-6fe2-441c-8c8c-71466251a162
removed unused prototype
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1073 c046a42c-6fe2-441c-8c8c-71466251a162
OS X port
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1007 c046a42c-6fe2-441c-8c8c-71466251a162
Mac OS X port
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@998 c046a42c-6fe2-441c-8c8c-71466251a162
fixed b[l] decoding
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@987 c046a42c-6fe2-441c-8c8c-71466251a162
cpu_single_env init
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@967 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC merge
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@861 c046a42c-6fe2-441c-8c8c-71466251a162
cleanup
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@855 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC merge: real time TB and decrementer - faster and simpler exception handling (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@841 c046a42c-6fe2-441c-8c8c-71466251a162
fixed invalid includes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@830 c046a42c-6fe2-441c-8c8c-71466251a162
ppc fix (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@816 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@765 c046a42c-6fe2-441c-8c8c-71466251a162
avoid unneeded casts
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@754 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC system emulation fixes (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@722 c046a42c-6fe2-441c-8c8c-71466251a162
fixed blr/bctr cases
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@631 c046a42c-6fe2-441c-8c8c-71466251a162
adding direct block chaining support - simplified branch code gen
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@630 c046a42c-6fe2-441c-8c8c-71466251a162